• DocumentCode
    2979997
  • Title

    D2BGA chip-scale IGBT package

  • Author

    Liu, Xingsheng ; Lu, Guo-Quan

  • Author_Institution
    Lab. of Power Electron. Packaging, Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
  • Volume
    2
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    1033
  • Abstract
    We present a chip-scale IGBT package, termed die dimensional ball grid array (D2BGA), which uses solder joints to interconnect power chips. D2BGA package consists of a power chip, inner solder caps, high-lead solder balls, and molding resin. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniature possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultra-low profile packaging. Electrical tests show that the VCE(sat) of the D 2BGA high speed IGBTs are improved by 20% to 30% by eliminating the device´s wirebonds and other external interconnections, such as leadframe. In this paper, we present the design and fabrication process of D2BGA package, and the application of these D2BGA package in building three-dimensional integrated power electronics modules (IPEMs). The electrical and temperature cycling test results of the packaged devices and the power modules are reported
  • Keywords
    insulated gate bipolar transistors; interconnections; modules; semiconductor device packaging; soldering; thermal management (packaging); D2BGA chip-scale IGBT package; die dimensional ball grid array; electrical characteristics; electrical cycling test; electrical tests; fabrication process; high current handling capability; high-density packaging; high-lead solder balls; inner solder caps; lateral dimensions; molding resin; power chip; power chips interconnection; solder joints; starting power chip; temperature cycling test; thermal transfer; three-dimensional integrated power electronics modules; ultra-low profile packaging; Chip scale packaging; Electric variables; Electronic packaging thermal management; Electronics packaging; Insulated gate bipolar transistors; Lead; Process design; Resins; Soldering; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition, 2001. APEC 2001. Sixteenth Annual IEEE
  • Conference_Location
    Anaheim, CA
  • Print_ISBN
    0-7803-6618-2
  • Type

    conf

  • DOI
    10.1109/APEC.2001.912493
  • Filename
    912493