• DocumentCode
    2980119
  • Title

    Refining switching window by time slots for crosstalk noise calculation

  • Author

    Chen, Pinhong ; Kukimoto, Yuji ; Keutzer, Kurt

  • Author_Institution
    Cadence Design Syst. Inc., San Jose, CA, USA
  • fYear
    2002
  • fDate
    10-14 Nov. 2002
  • Firstpage
    583
  • Lastpage
    586
  • Abstract
    For crosstalk noise calculation, computing switching windows of a net helps us identify noise sources accurately. Traditional approaches use a single continuous switching window for a net. Under this model, signal switching is assumed to happen any time within the window. Although conservative and sound, this model can result in too much pessimism since in reality the exact timing of signal switching is determined by a path delay up to the net, i.e. the underlying circuit structure does not always allow signal switching at arbitrary time within the continuous switching window. To address this inherent inaccuracy of the continuous switching window, we propose a refinement of the traditional approaches, where signal switching is characterized by a set of discontinuous switching windows instead of a single continuous window. Each continuous switching window is divided into multiple windows, called time slots, and the signal switching activity of each slot is analyzed separately to calculate the maximum noise with more accuracy. By controlling the size of a time slot we can trade off accuracy and runtime, which makes this approach highly scalable. We have confirmed by experiments on industrial circuits that up to 90% of the noise violations detected by the traditional approach can be unreal.
  • Keywords
    circuit CAD; crosstalk; delays; integrated circuit design; integrated circuit noise; timing; continuous switching window; crosstalk noise calculation; discontinuous switching windows; exact timing; noise sources; noise violations; path delay; signal switching; switching window; time slots; Acoustic noise; Capacitance; Circuit noise; Crosstalk; Delay effects; Rivers; Signal analysis; Switches; Switching circuits; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-7607-2
  • Type

    conf

  • DOI
    10.1109/ICCAD.2002.1167591
  • Filename
    1167591