Qualification methodology for sub-micron ICs at the Low Noise Underground Laboratory of Rustrel

Author

Lesea, A. ; Castellani-Coulié, K. ; Waysand, G. ; Le Mauff, J. ; Sudre, C.

Author_Institution

Xilinx, San Jose, CA, USA

fYear

2007

fDate

10-14 Sept. 2007

Firstpage

1

Lastpage

6

Abstract

Alpha contamination has become a major concern in ICs. To qualify packaging solutions for commercial, industrial, and aerospace/defense components, a program is described. The chosen methodology associates the use of real time testing in altitude and underground environments. Experiments are performed on Xilinx FPGAs. Goals, experiment design, statistical confidence, initial results are analyzed and discussed.

Keywords

field programmable gate arrays; integrated circuit design; integrated circuit packaging; integrated circuit testing; Low Noise Underground Laboratory; Xilinx FPGA; aerospace-defense components; alpha contamination; commercial components; industrial components; submicron IC; Aerospace industry; Aerospace testing; Alpha particles; Contamination; Defense industry; Field programmable gate arrays; Laboratories; Neutrons; Packaging; Qualifications; Alpha contamination; FPGA; Low Noise; Real time testing; SER; Underground test;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and Its Effects on Components and Systems, 2007. RADECS 2007. 9th European Conference on

Conference_Location

Deauville

ISSN

0379-6566

Print_ISBN

978-1-4244-1704-9

Type

conf

DOI

10.1109/RADECS.2007.5205485

Filename

5205485