Development of a reusable E1 transceiver suitable for rapid prototyping

Author

Vasilliou, A. ; Gounaris, K. ; Adaos, K. ; Mitsainas, D. ; Alexiou, G. ; Nikolos, D.

Author_Institution

Dept. of Comput. Eng. & Inf., Patras Univ., Greece

fYear

1999

fDate

36342

Firstpage

21

Lastpage

26

Abstract

Presents the design and development of an E1 transceiver with specifications posed by the ITU G.703 and ITU G.823 recommendations and INTRACOM S.A. (Hellenic Telecommunications and Electronics Industry, R&D Department). The development procedure is based on the use of a standard HDL and fulfils the requirements placed by industry for code reusability. The core design was successfully implemented in FPGA and ASIC technology. The verification in FPGA technology enables the rapid prototyping of a system using the specific core

Keywords

application specific integrated circuits; electronics industry; field programmable gate arrays; firmware; hardware description languages; software prototyping; software reusability; telecommunication computing; telecommunication standards; transceivers; ASIC technology; FPGA technology; HDL; Hellenic Telecommunications and Electronics Industry; INTRACOM S.A.; ITU G.703 recommendations; ITU G.823 recommendations; code reusability; development procedure; device specifications; hardware description language; industry requirements; rapid prototyping; reusable E1 transceiver; verification; Application specific integrated circuits; Costs; Design engineering; Field programmable gate arrays; Hardware design languages; Informatics; Prototypes; Research and development; Time to market; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 1999. IEEE International Workshop on

Conference_Location

Clearwater, FL

Print_ISBN

0-7695-0246-6

Type

conf

DOI

10.1109/IWRSP.1999.779026

Filename

779026