DocumentCode
2980952
Title
Process versions in rapid prototyping
Author
Osterling, Achim ; Ernst, Rolf
Author_Institution
Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
fYear
1999
fDate
36342
Firstpage
94
Lastpage
99
Abstract
Rapid prototyping in general requires the mapping of a system model to a hardware architecture which is different from the design target architecture. To take into account easier function reuse or late specification changes both system designs should be developed in parallel. Different architectures, however require different process adaptations and high-level optimizations. Therefore, several versions of process structures and high-level optimizations must be provided for the different architectures and component alternatives. In previous approaches, only one input version can be used which enforces design iterations over different versions of the input description. The main focus of the paper is to show the necessity for introducing design versions of the process structure in rapid prototyping. The user predefines possible versions of the process structure, high-level optimizations, and process segment granularity. These versions shall be used in a system scheduling and allocation process. Furthermore, a suitable design environment is introduced
Keywords
computer architecture; hardware-software codesign; scheduling; software prototyping; design iterations; hardware architecture; hardware software codesign; high-level optimization; process versions; rapid prototyping; scheduling; specification; system design; system model; Computer architecture; Costs; Digital signal processing; Field programmable gate arrays; Hardware; Manuals; Memory architecture; Prototypes; Read only memory; Software prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 1999. IEEE International Workshop on
Conference_Location
Clearwater, FL
Print_ISBN
0-7695-0246-6
Type
conf
DOI
10.1109/IWRSP.1999.779037
Filename
779037
Link To Document