DocumentCode :
2981062
Title :
The Impact of High-voltage Drift N-well and Shallow Trench Isolation Layouts on Electrical Characteristics of LDMOSFETs
Author :
Huang, C.T. ; Tsui, Bing-Yue ; Liu, Hsu-Ju ; Lin, Geeng-Lih
Author_Institution :
Nat. Chiao Tung Univ., Chiao Tung
fYear :
2007
fDate :
20-22 Dec. 2007
Firstpage :
267
Lastpage :
270
Abstract :
The impact of the high-voltage drift n- well (HVNW) and shallow trench isolation (STI) regions on the electrical characteristics of 32V symmetry and asymmetry n-channel laterally diffused drain MOSFET (N-LDMOS) were evaluated. Asymmetry structure has higher threshold voltage owing to the transient enhancement diffusion (TED) of boron near source region. The smaller extension of the HVNW to STI (EHVNW-STI) for asymmetry structure exhibits a wider safe-operating-area (SOA) from the hot-carrier reliability point of view. To obtain a higher on-current, the EHVNW-STI) should be optimized because the steep sidewall of the STI may force current to flow through a longer distance in the HVNW. Finally, increase of EHVNW-STI cannot efficiently increase breakdown voltage.
Keywords :
hot carriers; integrated circuit layout; power MOSFET; semiconductor device breakdown; semiconductor device reliability; LDMOSFET; asymmetry n-channel laterally diffused drain MOSFET; boron near source region; breakdown voltage; electrical characteristics; high-voltage drift n-well impact; hot-carrier reliability; shallow trench isolation layouts; transient enhancement diffusion; Boron; Breakdown voltage; CMOS process; Electric variables; Hot carriers; MOSFET circuits; Modems; Semiconductor optical amplifiers; Silicides; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
Type :
conf
DOI :
10.1109/EDSSC.2007.4450113
Filename :
4450113
Link To Document :
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