A Floating RESURF EDMOS with Enhanced Ruggedness and Safe Operating Area

Author

Wang, Hao ; Yoo, Abraham ; Xu, H. P Edward ; Ng, Wai Tung ; Fukumoto, Kenji ; Ishikawa, Akira ; Imai, Hisaya ; Sakai, Kimio ; Takasuka, Kaoru

Author_Institution

Univ. of Toronto, Toronto

fYear

2007

fDate

20-22 Dec. 2007

Firstpage

279

Lastpage

282

Abstract

In this paper, a floating RESURF EDMOS (BV = 55 V, R_on,sp = 36.5 mOmegamiddotmm²) with 45% increased ruggedness and 400% enhanced safe operating area (SOA) is discussed and compared to the conventional EDMOS structure. The proposed EDMOS has both drain and source engineering to enhance device ruggedness, not only via reducing the base resistance of the parasitic bipolar transistor, but also suppressing the base current of the parasitic bipolar transistor at high V_GS and high V_DS situations, which will also improve the device SOA. Furthermore, the buried deep Nwell allow the device to have better tradeoff between breakdown voltage and on-resistance.

Keywords

MOSFET; bipolar transistors; buried deep Nwell; device ruggedness; extended drain MOS transistor; floating RESURF EDMOS; parasitic bipolar transistor; safe operating area; undamped inductive switching; voltage 55 V; Avalanche breakdown; Bipolar transistors; Circuit testing; Driver circuits; MOSFETs; Power electronics; Roentgenium; Semiconductor optical amplifiers; Switching circuits; Voltage; EDMOS; Safe Operation Area (SOA); Unclamped Inductive Switching (UIS); floating RESURF; parasitic bipolar transistor;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on

Conference_Location

Tainan

Print_ISBN

978-1-4244-0637-1

Electronic_ISBN

978-1-4244-0637-1

Type

conf

DOI

10.1109/EDSSC.2007.4450116

Filename

4450116