DocumentCode :
2981145
Title :
A serial-link transceiver based on 8 GSample/s A/D and D/A converters in 0.25 /spl mu/m CMOS
Author :
Ellersick, W. ; Yang, C.-K.K. ; Stojanovic, V. ; Modjtahedi, S. ; Horowitz, M.A.
Author_Institution :
Stanford Univ., CA, USA
fYear :
2001
fDate :
7-7 Feb. 2001
Firstpage :
58
Lastpage :
59
Abstract :
On-chip VCOs generate 16 clock phases that drive an 8-way interleaved 4b A/D input receiver and an 8-way interleaved 8b D/A transmitter. 4 GHz bandwidth is achieved by inductors that distribute the I/O capacitance and a transmit equalizer. Digital calibration adjusts the sample timing to 10 ps, the input and output accuracy to <1 LSB and 3 LSBs, respectively.
Keywords :
CMOS integrated circuits; analogue-digital conversion; digital communication; digital-analogue conversion; transceivers; 0.25 micron; 10 ps; 4 GHz; 4 bit; 8 bit; A/D converters; CMOS; D/A converters; D/A transmitter; I/O capacitance; clock phases; digital calibration; input accuracy; interleaved input receiver; on-chip VCOs; output accuracy; sample timing; serial-link transceiver; transmit equalizer; Bandwidth; Calibration; Capacitance; Clocks; Drives; Equalizers; Inductors; Timing; Transceivers; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-6608-5
Type :
conf
DOI :
10.1109/ISSCC.2001.912544
Filename :
912544
Link To Document :
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