DocumentCode :
2981170
Title :
3.2 GHz 6.4 Gb/s per wire signaling in 0.18 /spl mu/m CMOS
Author :
Haycock, M. ; Mooney, R.
Author_Institution :
Intel Corp., Hillsboro, OR, USA
fYear :
2001
fDate :
7-7 Feb. 2001
Firstpage :
62
Lastpage :
63
Abstract :
Simultaneous bidirectional signaling provides 6.4 Gb/s/wire with random data on a 22 b point-to-point bus over 15 cm on a PCB. The signaling rate decreases to 2.4 Gb/s/wire over 122 cm through 2 connectors. The I/O circuits have closed-loop slew rate control and are part of a 6.6 M transistor router component that consumes 21 W, packaged in a 31/spl times/31 mm/sup 2/ OLGA substrate.
Keywords :
CMOS digital integrated circuits; closed loop systems; data communication; network routing; system buses; telecommunication signalling; 0.18 micron; 15 cm; 21 W; 22 bit; 32 GHz; 6.4 Gbit/s; CMOS chip; I/O circuit; OLGA substrate; PCB; closed-loop slew rate control; point-to-point bus; random data; simultaneous bidirectional signaling; transistor router; Circuit testing; Clocks; Frequency; Impedance; Integrated circuit interconnections; Leg; Phase locked loops; Resistors; Switches; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-6608-5
Type :
conf
DOI :
10.1109/ISSCC.2001.912546
Filename :
912546
Link To Document :
بازگشت