• DocumentCode
    2981335
  • Title

    ViperBGA: a novel design approach to high performance and high density BGA´s

  • Author

    Wu, Po-Han ; Chen, K.

  • Author_Institution
    ProLinx Lab., San Jose, CA
  • fYear
    1997
  • fDate
    13-15 Oct 1997
  • Firstpage
    386
  • Lastpage
    390
  • Abstract
    Clock speed requirements will approach 500 MHz and above and thermal requirements of packages will be over 15 watts by the turn of the century as predicted by SIA and electronic industry analysts. The PDA, laptop markets and the cellular markets are increasingly demanding smaller footprint and low cost packaging. ProLinx´s ViperBGA with its patented MicroFilled Via technology has been successful in meeting the above market demands. The ViperBGA exhibits a high electrical performance and a high thermal performance at a considerable cost savings compared to current high performance substrates. These enhancements are further optimized by proper use of 3D field solvers as well as extensive use of finite element modeling and the EGA substrate´s thermal and electrical parasitics measurements. This paper will discuss a methodology in which modeling combined with ProLinx´s BGA designer software is effectively used to optimize the layout of the EGA substrate for high density interconnect routing and optimal placement of electrical and thermal vias for performance enhancements before the manufacturing of the substrates. Measurements are performed after the substrate has been manufactured, and correlated with modeling. Modeling and measurements are done on both the two layer and three layer, cavity down and cavity up substrates
  • Keywords
    circuit layout CAD; finite element analysis; integrated circuit interconnections; integrated circuit packaging; network routing; 3D field solvers; ViperBGA; cavity down substrates; cavity up substrates; electrical parasitics measurements; finite element modeling; footprint; high density BGA; high density interconnect routing; layout; optimal placement; performance enhancements; thermal requirements; Clocks; Costs; Electric variables measurement; Electronic packaging thermal management; Electronics industry; Finite element methods; Portable computers; Software design; Software performance; Virtual manufacturing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Symposium, 1997., Twenty-First IEEE/CPMT International
  • Conference_Location
    Austin, TX
  • ISSN
    1089-8190
  • Print_ISBN
    0-7803-3929-0
  • Type

    conf

  • DOI
    10.1109/IEMT.1997.626949
  • Filename
    626949