DocumentCode
2981401
Title
A 10 kframe/s 0.18 /spl mu/m CMOS digital pixel sensor with pixel-level memory
Author
Kleinfelder, S. ; Suki-Iwan Lim ; Xinqiao Liu ; El Gamal, A.
Author_Institution
Stanford Univ., CA, USA
fYear
2001
fDate
7-7 Feb. 2001
Firstpage
88
Lastpage
89
Abstract
A 352/spl times/288 pixel CMOS image sensor with pixel-level single-slope ADC and 8 b 3T DRAM cells achieves 9.4/spl times/9.4 /spl mu/m/sup 2/ pixel in standard 0.18 /spl mu/m CMOS. Continuous 10 kframes/s (1 Gpixels/s) 8 b per pixel snapshot image acquisition is achieved with 0.1% rms temporal noise and 0.18% rms FPN.
Keywords
CMOS digital integrated circuits; CMOS image sensors; CMOS memory circuits; DRAM chips; analogue-digital conversion; integrated circuit noise; 0.18 micron; 288 pixel; 352 pixel; 8 bit; CMOS digital pixel sensor; DRAM cell; fixed pattern noise; image acquisition; pixel-level memory; single-slope ADC; temporal noise; CMOS image sensors; CMOS technology; Circuit noise; Counting circuits; Image sensors; MOS devices; Noise reduction; Pixel; Sensor arrays; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-6608-5
Type
conf
DOI
10.1109/ISSCC.2001.912558
Filename
912558
Link To Document