Title :
An Ultra-Low Temperature-Coefficient CMOS Voltage Reference
Author :
Lai, H.C. ; Lin, Z.M.
Author_Institution :
Nat. Changhua Univ. of Educ., Changhua
Abstract :
A CMOS voltage reference, which is based on the same magnitude of gate-source voltage of an NMOS and a PMOS operating in saturation region, is presented. The voltage reference is designed for CMOS low-dropout linear regulators and has been implemented in TSMC 0.18 mum CMOS process. The effect area is only 18 mu m times 25 mu m. It gives a temperature coefficient of not greater than 0.68 ppm/degC from -70degC to 150degC without trimming, while consuming a maximum of 1 mu A with a supply voltage of 0.9 V.
Keywords :
CMOS integrated circuits; CMOS low-dropout linear regulators; CMOS voltage reference; NMOS; PMOS; TSMC; current 1 muA; gate-source voltage; size 0.18 mum; temperature -70 degC to 150 degC; ultra-low temperature-coefficient; voltage 0.9 V; CMOS process; CMOS technology; Circuit synthesis; MOS devices; Mirrors; Photonic band gap; Power supplies; Semiconductor diodes; Temperature distribution; Threshold voltage;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
DOI :
10.1109/EDSSC.2007.4450139
