Title :
A 2.5 V 12 b 54 MSample/s 0.25 /spl mu/m CMOS ADC in 1 mm/sup 2/
Author :
Van Der Ploeg, H. ; Hoogzaad, G. ; Termeer, H.A.H. ; Vertregt, M. ; Roovers, R.L.J.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Abstract :
Background digital offset extraction and analog compensation remove offset of the critical analog components. The calibrated two-step ADC achieves -70 dB THD in the Nyquist band with a 2.5 V supply. The ADC in 0.25 μm CMOS measures 1.0 mm/sup 2/ and dissipates 295 mW.
Keywords :
CMOS integrated circuits; analogue-digital conversion; circuit feedback; error compensation; 0.25 micron; 12 bit; 2.5 V; 295 mW; CMOS ADC; analog compensation; analogue feedback; background digital offset extraction; calibrated two-step architecture; dual residue signal processing; Calibration; Choppers; Circuits; Feedback; Quantization; Resistors; Robustness; Sampling methods; Signal processing algorithms; Switches;
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6608-5
DOI :
10.1109/ISSCC.2001.912574
