DocumentCode :
2981808
Title :
The impact of tool delivery times on the optimal capacity and value of semiconductor wafer fabs
Author :
Wood, Samuel G.
Author_Institution :
Graduate Sch. of Bus., Stanford Univ., CA, USA
fYear :
1997
fDate :
13-15 Oct 1997
Firstpage :
396
Lastpage :
402
Abstract :
The objective of this work is to provide insight into the sources and magnitude of the costs that result from lost market responsiveness due to long capacity lead times. A model has been developed to determine the impact of tool lead times on the expected present value of monolithic fabs and modular a fab over the fab lifetime. The model makes the following assumptions and approximations: Demand follows a random walk characterized by a known drift rate and volatility; Capacity lead times are known in advance longer capacity lead times result in tools being ordered earlier than tools with late lead times; Management has the option of sparsely populating a fab initially and then adding additional tools as needed. This is referred to as a modular fab. Cost parameters representing modern 200 mm wafer fabs are used. Based on the above assumptions optimal capacity expansion schedules are numerically generated. Initial results show that as capacity lead times get shorter, initial fab size is likely to be smaller and future capacity additions are likely to become more frequent. If capacity lead times are short, fab capacities can be more accurately matched to demand, achieving higher expected revenues. The increase in revenues can be used to evaluate the financial value of shorter capacity lead times
Keywords :
economics; integrated circuit manufacture; 200 mm; cost; drift rate; financial value; lead time; management; market responsiveness; modular fab; monolithic fab; optimal capacity; random walk model; semiconductor wafer fab; tool delivery time; volatility; Consumer electronics; Cost function; Coupling circuits; Delay; Economies of scale; Environmental economics; Job shop scheduling; Lead compounds; Productivity; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1997., Twenty-First IEEE/CPMT International
Conference_Location :
Austin, TX
ISSN :
1089-8190
Print_ISBN :
0-7803-3929-0
Type :
conf
DOI :
10.1109/IEMT.1997.626951
Filename :
626951
Link To Document :
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