DocumentCode
2982004
Title
A wideband 1.3 GHz PLL for transmit remodulation suppression
Author
Martin, F.L. ; Alford, R.C. ; Marks, J. ; Raven, G.S. ; Rollman, J.
Author_Institution
Motorola Inc., Plantation, FL, USA
fYear
2001
fDate
7-7 Feb. 2001
Firstpage
164
Lastpage
165
Abstract
A 1.3 GHz 0.5 /spl mu/m BiCMOS offset PLL realizes -132 dBc/Hz in-band phase noise while reducing re-radiated transmission by 53 dB. The circuit operates without an offset signal. Elements include digital phase detector with steering operating to 1.3 GHz and digital frequency divider with programmable modulus from 1 to 1.5 in steps of 0.03125. Current is 10 mA from 2.7 V. Die is 1.2 mm/sup 2/.
Keywords
BiCMOS digital integrated circuits; UHF integrated circuits; digital phase locked loops; phase noise; 0.5 micron; 1.3 GHz; 10 mA; 2.7 V; digital frequency divider; digital phase detector; phase noise; programmable modulus; steering operation; transmit remodulation suppression; wideband BiCMOS offset PLL; Bandwidth; Circuits; Frequency conversion; Frequency locked loops; Phase detection; Phase frequency detector; Phase locked loops; Transmitters; Voltage-controlled oscillators; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-6608-5
Type
conf
DOI
10.1109/ISSCC.2001.912588
Filename
912588
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