Power-efficient application-specific VLIW processor for turbo decoding

Author

Bekooij, M. ; Dielissen, J. ; Harmsze, F. ; Sawitzki, S. ; Huisken, J. ; van der Weri, A. ; van Meerbergen, J.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

2001

fDate

7-7 Feb. 2001

Firstpage

180

Lastpage

181

Abstract

A method permits coprocessors to be embedded inside a programmable VLIW processor. Synchronization of the coprocessors and the VLIW processor is determined at compile-time by the VLIW scheduler. The implementation of a power-efficient turbo decoder demonstrates the effectiveness of this method.

Keywords

application specific integrated circuits; coprocessors; decoding; microprocessor chips; parallel architectures; turbo codes; application-specific VLIW processor; coprocessors; power-efficient decoder; synchronization; turbo decoding; Application software; Bit error rate; Coprocessors; Design methodology; High level synthesis; Iterative decoding; Parallel processing; Processor scheduling; Software tools; VLIW;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-6608-5

Type

conf

DOI

10.1109/ISSCC.2001.912594

Filename

912594

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2982116