Title :
Investigation of Wafer Strength in 12 inch Bare Wafer for Prevent Wafer Breakage
Author :
Po-Ying Chen ; Jing, M.H. ; Tin, T.C.
Author_Institution :
I-Shou Univ., Kaohsiung
Abstract :
It is well known that silicon was belonging to a hard and easy breakage (brittle) material. Beside, the trend in wafer size increasing of the microelectronics circuits has been driven by modern IC manufacturing technology. In other words, wafer broken is an annoying problem in the IC manufacturing industry. Due to its brittle nature, a lot of stresses induced in the in-line process, thus it is more applicable for silicon strength to be characterized at wafer level. When the trend in microelectronic process is going toward larger and larger in size, the study of silicon wafer strength has been recognized as an important parameter in IC process. The strength of silicon wafer is heavily dependent on how the wafer edge shape design is prepared prior to film stress induced on surface. Flaws such as small micro cracks or etch pits can occur during IC process causing the strength of the silicon to decrease and fracture. In this work, a study was investigating the effect of wafer strength to the design profile of wafer edge using a mechanical drop test and in-line breakage ratio collection. The wafer strength was characterized using a mechanical drop test while the design profile of wafer edge was characterized using optical image analyzer.
Keywords :
integrated circuit manufacture; IC manufacturing industry; film stress; mechanical drop test; microelectronics circuits; optical image analyzer; silicon wafer strength; wafer breakage; wafer edge shape design; wafer strength; Circuits; Etching; Manufacturing industries; Microelectronics; Semiconductor films; Shape; Silicon; Stress; Surface cracks; Testing;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
DOI :
10.1109/EDSSC.2007.4450182