DocumentCode
2982531
Title
A redundant multi-valued logic for 10 Gb/s CMOS demultiplexer IC
Author
Tanabe, A. ; Nakahara, Y. ; Furukawa, A. ; Mogami, Tohru
Author_Institution
NEC Corp., Kanagawa, Japan
fYear
2001
fDate
7-7 Feb. 2001
Firstpage
220
Lastpage
221
Abstract
A redundant multi-valued logic is used in >Gb/s communication lC applications. Using this logic, a quadruple data rate demultiplexer (serial-parallel converter) IC in 0.18 /spl mu/m CMOS achieves 10 Gb/s operation with 1.3 V supply and 38 mW consumption.
Keywords
CMOS logic circuits; demultiplexing equipment; multivalued logic circuits; redundancy; 0.18 micron; 1.3 V; 10 Gbit/s; 38 mW; CMOS demultiplexer IC; high-speed communication; redundant multi-valued logic; serial-parallel converter; CMOS integrated circuits; CMOS logic circuits; Clocks; Frequency; Logic testing; Multivalued logic; Phase locked loops; Semiconductor device measurement; Timing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-6608-5
Type
conf
DOI
10.1109/ISSCC.2001.912612
Filename
912612
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