DocumentCode :
2982690
Title :
The impact of strain technology on device performnance and reliability for sub-90nm FUSI SOI MOSFETs
Author :
Chen, Jiun-Yu ; Wang, Chen-An ; Yeh, Wen-Kuan
Author_Institution :
Nat. Univ. of Kaohsiung, Kaohsiung
fYear :
2007
fDate :
20-22 Dec. 2007
Firstpage :
593
Lastpage :
596
Abstract :
For FUSI SOI CMOSFET, the impact of high stress contact etching stop layer (CESL) SiN layer on device performance and reliability were investigated. In this work, FUSI SOI n/pMOSFET driving capability and mobility can be enhanced with high tensile and compressive CESL layer in respectively; we found that high stress CESL layer will also induced more damages especially on 90 nnm device, resulting in FUSI SOI device degradation.
Keywords :
MOSFET; etching; semiconductor device reliability; silicon compounds; FUSI SOI CMOSFET; SiN; contact etching stop layer; driving capability; reliability; semiconductor device; strain technology; CMOS technology; CMOSFETs; Capacitive sensors; Compressive stress; Electrodes; Etching; MOSFET circuits; Silicon compounds; Tensile stress; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0636-4
Electronic_ISBN :
978-1-4244-0637-1
Type :
conf
DOI :
10.1109/EDSSC.2007.4450194
Filename :
4450194
Link To Document :
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