Title :
A 2 GHz CMOS image-reject receiver with sign-sign LMS calibration
Author :
Der, L. ; Razavi, B.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
The trade-off between image rejection and channel selection in heterodyne receivers often restricts the frequency planning and requires external image-reject filters. Hartley and Weaver image reject architectures partially resolve this issue at the cost of requiring precise phase and gain matching in both the signal path and the local oscillator (LO) path. The use of polyphase filters to improve the matching typically leads to a high power dissipation whereas analog calibration mandates periodic refreshing, a difficult issue in CDMA systems that must receive continuously. In this Weaver receiver, gain and phase mismatches are calibrated simultaneously by a least-mean-square (LMS) algorithm. The receiver targets a sensitivity and blocking performance commensurate with wideband CDMA (WCDMA) systems.
Keywords :
CMOS integrated circuits; UHF integrated circuits; calibration; code division multiple access; heterodyne detection; least mean squares methods; low-power electronics; radio receivers; wireless LAN; 2 GHz; CMOS image-reject receiver; Weaver receiver; analog calibration; blocking performance; channel selection; external image-reject filters; frequency planning; heterodyne receivers; image reject architectures; image rejection; least-mean-square algorithm; local oscillator path; periodic refreshing; phase mismatches; polyphase filters; power dissipation; sign-sign LMS calibration; signal path; wideband CDMA; Calibration; Costs; Frequency; Image resolution; Least squares approximation; Local oscillators; Matched filters; Multiaccess communication; Power dissipation; Signal resolution;
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6608-5
DOI :
10.1109/ISSCC.2001.912644