DocumentCode :
298336
Title :
Multithreaded tightly-coupled multiprocessor system
Author :
Chaudhry, G.M. ; Li, X.C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Missouri Univ., Columbia, MO, USA
Volume :
1
fYear :
1994
fDate :
3-5 Aug 1994
Firstpage :
286
Abstract :
As a shared-memory multiprocessor is scaled, there will be an increase in the network latency, due to the increase of the remote memory access requests. The latency can cause a significant drop in processor utilization. This paper describes the proposed multithreaded multiprocessor system, in which there are number of hardware contexts per CPU, multiple buses and memory modules. It uses a coarse-grain method to schedule threads and two-phase waiting algorithm to synchronize the waiting threads. The results include the effect of the relationship among the number of hardware contexts, memory modules and buses for a multithreaded multiprocessor system
Keywords :
multiprocessor interconnection networks; performance evaluation; processor scheduling; shared memory systems; synchronisation; coarse-grain method; memory modules; multiple buses; multithreaded multiprocessor system; network latency; scheduling; shared-memory multiprocessor; tightly-coupled multiprocessor system; two-phase waiting algorithm; waiting threads synchronisation; Availability; Communication switching; Context modeling; Delay; Hardware; Multiprocessing systems; Multiprocessor interconnection networks; Resumes; Switches; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-7803-2428-5
Type :
conf
DOI :
10.1109/MWSCAS.1994.519240
Filename :
519240
Link To Document :
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