DocumentCode
2983677
Title
A LNA Design for WCDMA Application In 0.18um CMOS Process
Author
Wang, Xiao-Dong ; Song, Jia-You
Author_Institution
Zhengzhou Univ., Zhengzhou
fYear
2007
fDate
18-21 April 2007
Firstpage
1
Lastpage
4
Abstract
This paper presents a design and optimization method for low noise amplifiers (LNAs), based on the minimization of the noise figure for a given power consumption. The LNA design is realized through the 0.18 mum CMOS process with the operating frequency at 2.14GHz. Simulation results show that the amplifier draws 5.36 mA from a given 1.8 V supply voltage while keeping the input/output impedance matched to 50 Omega. Furthermore, the circuit behaviors with 0.655 dB noise figure, gain of 16.64 dB, 1 dB compression point of about -12 dBm and IIP3 of 6 dBm.
Keywords
CMOS analogue integrated circuits; integrated circuit noise; low noise amplifiers; CMOS process; WCDMA application; frequency 2.14 GHz; low noise amplifier; size 0.18 micron; voltage 1.8 V; CMOS process; Circuit simulation; Design methodology; Energy consumption; Frequency; Low-noise amplifiers; Minimization methods; Multiaccess communication; Noise figure; Optimization methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter Wave Technology, 2007. ICMMT '07. International Conference on
Conference_Location
Builin
Print_ISBN
1-4244-1049-5
Electronic_ISBN
1-4244-1049-5
Type
conf
DOI
10.1109/ICMMT.2007.381467
Filename
4266226
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