Optimal mapping of feedforward neural networks onto multiple bus architectures

This paper addresses the problem of mapping a feedforward ANN onto a multiple bus system, MBS, with p processors and b buses so as to minimize the total execution time. We model the computational requirements of ANN by an m-partite graph called FFCG and show that the mapping problem can be reduced to that of optimally mapping a single (arbitrary) computational layer (c-layer) to the MBS. We present an algorithm which assigns the nodes of a given c-layer to processors such that the computation lower bound [N^l/p]t_p^l and the communication lower bound [N^l/b]t_c, are achieved simultaneously, where N^l is the number of nodes in the mapped c-layer, and t_p^l and t_c, are the computation and communication times, respectively, associated with a node in the layer. When computation and communication are not overlapped, we show that the optimal number of processors needed is either 1 or p, depending on the ratio t_p^l/t_c . We show how the total execution time can be reduced by overlapping computation and communication. In that case, we show that the optimal number of processors needed is either 1 or (t_p ^l/t_c)b. We show that there is a unique arrangement of interfaces such that the total number of interfaces is minimum and the optimal time is reached. Finally, we compare the relative merits of the hypercube and the MBS and show the superiority of the latter in simulating an ANN