DocumentCode :
298377
Title :
An automatic VLSI implementation of Hopfield ANNs
Author :
Fornaciari, William ; Salice, Fabio
Author_Institution :
CEFRIEL, Milan, Italy
Volume :
1
fYear :
1994
fDate :
3-5 Aug 1994
Firstpage :
499
Abstract :
The aim of this paper is to present a methodology covering the digital synthesis of a Hopfield neural network. The obtained system is based on a proper pipelined/multiplexed connection among some basic processing elements called pseudo-neurons and is able to support only the recall phase
Keywords :
Hopfield neural nets; VLSI; neural chips; neural net architecture; ANN; Hopfield neural network; VLSI; digital synthesis; multiplexed connections; pipelined connections; pseudo-neurons; recall phase; Amplitude shift keying; Artificial neural networks; Circuit synthesis; Electronic mail; Hopfield neural networks; Network synthesis; Neural networks; Neurons; Time to market; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-7803-2428-5
Type :
conf
DOI :
10.1109/MWSCAS.1994.519287
Filename :
519287
Link To Document :
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