A Design of 4-bit "Distributed drive" MEMS Phase Shifters

An idea of "distributed drive" MEMS phase shifter is first proposed in this dissertation. The minimum phase shift bit act as elementary cell. The multi-bits phase shifter is consist of dozens of series cell. The phase shift is increased by sequence change phase shift of cell. It decrease the reflection plane from 0-3 to 0-1 for 4 bit phase shifter, further decrease the return loss and insertion loss. In this paper, the full wave electromagnetic simulation of the 22.5deg phase shift cell is done by HFSS. A 4-bit DMTL phase shifter that cascaded by 15 cell is simulated by ADS. The maximal return loss is -11 dB for "distributed drive", and - 7.5dB for conventionality from DC to 32 GHz. The insertion loss is better than -3 dB from DC to 32 GHz for "distributed drive". The insertion loss is -3.5 dB at 16 GHz for conventionality.