• DocumentCode
    2984171
  • Title

    Multi-gigahertz low-power low-skew rotary clock scheme

  • Author

    Wood, J. ; Lipa, S. ; Franzon, P. ; Steer, M.

  • fYear
    2001
  • fDate
    7-7 Feb. 2001
  • Firstpage
    400
  • Lastpage
    401
  • Abstract
    On-chip clock frequencies in the gigaHertz range require generators with low skew and low jitter to avoid timing problems. This rotary clock distribution architecture provides low-skew low-jitter, gigaHertz-rate clocking with high edge rates and low power consumption, works over a wide power supply range and is completely scalable. The frequency is limited only by f/sub T/ of the integrated circuit technology used; an f/sub T/ of approximately 30 GHz produces square waves with 20 ps transition times. In addition, there is no limit to the size of the chip that can be clocked, and both multiphase and non-overlapping noise-immune differential clocking are supported.
  • Keywords
    clocks; low-power electronics; 20 ps; 30 GHz; clock distribution; integrated circuit technology; low-power low-skew rotary clock generator; scalable architecture; Capacitance; Clocks; Conductors; Frequency; Integrated circuit interconnections; Inverters; Power supplies; Power transmission lines; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-6608-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2001.912692
  • Filename
    912692