Title :
A 5GHz Low Phase Noise Hartley Quadrature CMOS VCO
Author :
Jang, Sheng-Lyang ; Chen, Hwan-Mei ; Han, Jui-Cheng ; Lee, Chien-Feng ; Jhuang, You-Da
Author_Institution :
Nat. Taiwan Univ. of Sci. & Tech., Taipei
Abstract :
A novel low phase noise quadrature voltage-controlled oscillator (QVCO) with two coupled Hartley VCOs is proposed and implemented using the standard TSMC 0.18 um CMOS 1P6M process. The QVCO employs pMOS as the core to reduce the up-conversion of low-frequency device noise to RF phase noise. It uses super-harmonic coupling technique to couple two differential Hartley VCOs and four small-size coupling transistors to set the directivity of quadrature output phases. At the 1.8 V supply voltage, the output phase noise of the QVCO is -125.6 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.06 GHz, and the figure of merit is -188.0 dBc/Hz. At the supply voltage of 1.8 V, the total power consumption is 17.4 mW. The die area is 0.982 times 0.992 mm2.
Keywords :
CMOS integrated circuits; MOSFET; coupled circuits; integrated circuit noise; microwave integrated circuits; microwave oscillators; semiconductor device noise; voltage-controlled oscillators; TSMC CMOS 1P6M process; frequency 5 GHz; low phase noise Hartley quadrature VCO; pMOS transistors; power 17.4 mW; size 0.18 mum; super-harmonic coupling technique; voltage 1.8 V; voltage-controlled oscillator; CMOS technology; Capacitors; Coupling circuits; Energy consumption; Inductors; MOSFETs; Phase noise; Radio frequency; Transceivers; Voltage-controlled oscillators; CMOS; Hartley oscillator; quadrature voltage-controlled oscillators (QVCO); transformer coupling;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
DOI :
10.1109/EDSSC.2007.4450286
