Title :
Concurrent self test of switched current circuits based on the S 2I-technique
Author :
Sæther, Geir E. ; Toumazou, Chris ; Taylor, Gaynor ; Eckersall, Kevin ; Bell, Ian M.
Author_Institution :
Imperial Coll. of Sci., Technol. & Med., London, UK
fDate :
30 Apr-3 May 1995
Abstract :
This article presents a new concept for concurrent self test of switched current circuits based on S2I cells as basic building blocks. Six different transistor faults were modelled and the ability to detect the various fault-situations was studied. The fault detection system presented was applied to a simple switched-current integrator in which all the different faults were introduced sequentially in all transistors. The fault coverage was derived and the result shows that a powerful system for detection of transistor faults in an analogue sampled-data system can be realised with a minimum of additional overhead circuitry
Keywords :
CMOS analogue integrated circuits; VLSI; analogue processing circuits; automatic testing; fault diagnosis; fault location; integrated circuit testing; sampled data circuits; switched current circuits; S2I cells; S2I-technique; analogue sampled-data system; concurrent self test; fault coverage; fault detection system; switched current circuits; switched-current integrator; transistor fault modelling; Automatic testing; CMOS process; Circuit faults; Circuit simulation; Circuit testing; Impedance; Production; Semiconductor device modeling; Signal processing; Switching circuits;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.519894