Title :
A Case Study On Asynchronous VLSI Design Platform
Author :
Yang, Jung-Lin ; Hsu, Wei-Che ; Lin, Sung-Min
Abstract :
The technology trend has given asynchronous design a rebirth as number of designs and researching theories are being proposed in recent years. According to the Academic and commercial asynchronous EDA tools are booming like bamboo shoots after a spring shower. However, the development of the tools is dispersed and lack of integration and compatibility. It is inconvenient for the design engineers and also for those who are potentially becoming one and as a student now. We propose an asynchronous platform which allows FPGA board docking onto an ARM-based development kit to simulate and verify the HDL-compatible coding styles in the synthesis. We set up a design flow to stricken the asynchronous design methodology by reducing the complexity of transforming channel-level to handshaking-level in the high-level synthesis and simulation and then the synthesized design can be verified and tested on a FPGA experiment system.
Keywords :
VLSI; field programmable gate arrays; hardware description languages; ARM-based development; FPGA; asynchronous EDA tool; asynchronous VLSI design; Circuit simulation; Circuit synthesis; Control system synthesis; Delay; Design engineering; Electronic design automation and methodology; Field programmable gate arrays; Hardware design languages; Signal synthesis; Very large scale integration;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
DOI :
10.1109/EDSSC.2007.4450336
