Improving ARQ protocol performance by multiple FIFO buffers

A family of automatic repeat request (ARQ) protocols that can be implemented through relatively simple hardware (one or more first in, first out, or FIFO, buffers and some limited state information) is considered. With a single FIFO buffer, the protocol is identical to a regular go-back-N. By increasing the number of FIFO buffers, a full selective repeat can be reached. The main result is to show that, for typical error rates, performance close to selective repeat can be obtained with two or three FIFO buffers. The family of protocols is described in detail, and the throughput is analyzed. For the two-buffer case, a closed-form solution is obtained, while for other cases, simulation results are given