The impact of VLSI fabrication on neural learning

The fabrication of silicon versions of artificial neural learning algorithms in existing VLSI processes introduces a variety of concerns which do not exist in a theoretical system. These include such well known circuit properties as noise, variations and nonlinearity of fabricated devices, arithmetic inaccuracy, and capacitive decay. The supervised learning algorithm-contrastive Hebbian learning, and unsupervised soft competitive learning have demonstrated their resiliency in the presence of these effects as observed in 1.2 μm CMOS circuits employing Gilbert multipliers. It has been found that the learning circuits will operate correctly in the presence of offset errors in analog multipliers and adders, if thresholding is applied when performing weight updates