DocumentCode :
2985758
Title :
Design of ESD protection with SCR-based structures for latch-up immunity
Author :
Jin Woo Jung ; Byung Seok Lee ; Yong Nam Choi ; Jung Woo Han ; Yong Seo Koo
Author_Institution :
Dept. of Electron. & Electr. Eng., Dankook Univ., Yongin, South Korea
fYear :
2013
fDate :
22-25 Oct. 2013
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, we proposed a novel SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for I/O and power clamp. HHVSCR (High Holding Voltage SCR) has a high holding voltage and low trigger voltage characteristics than conventional SCR. And advanced HHVSCR is proposed for high voltage application. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. Proposed ESD protection circuits are verified and compared by TCAD simulation. As a result of simulation, holding voltage increases with different design parameters. The holding voltage of HHVSCR changes from 3V to 4.83V. On the other hands, the holding voltage of Advanced HHVSCR changes from 4.61V to 8.75V. The trigger voltage of HHVSCR has about 8~9V whereas Advanced HHVSCR varies from 27.3V to 32.7V due to different breakdown occurrence.
Keywords :
electrostatic discharge; thyristors; ESD protection; HHVSCR; SCR-based structures; TCAD simulation; electrostatic discharge protection circuit; full chip ESD protection; high holding voltage SCR; latch-up immunity; power clamp; silicon controlled rectifier; Anodes; Bipolar transistors; Breakdown voltage; Cathodes; Electrostatic discharges; Junctions; Thyristors; ESD; Electrostatic Discharge; SCR; holding voltage; trigger voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2013 - 2013 IEEE Region 10 Conference (31194)
Conference_Location :
Xi´an
ISSN :
2159-3442
Print_ISBN :
978-1-4799-2825-5
Type :
conf
DOI :
10.1109/TENCON.2013.6718978
Filename :
6718978
Link To Document :
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