Cost implications of CSP infrastructure

IBIS Associates has spent the past year working to understand the economics of high density interconnect technology. Given that the trend toward greater function in a smaller form factor shows no signs of slowing, the costs of the infrastructure that will enable widespread adoption of chip scale packages (CSPs) need to be understood from a systems perspective. This paper analyzes the cost of fabricating PWBs with higher densities, typically called microvia PWBs, build-up PWBs, or high density interconnect (HDI). As this analysis shows, microvias can allow cost reduction in addition to higher wiring density: boards that were redesigned for microvia technology often cost less because they “shrunk” when they were redesigned, allowing more boards to be processed per panel. However, aggressive use of microvia technology can lead to significant yield losses, since PWB fabricators are still learning how to manufacture high density boards. Consequently, system designers need to balance two issues: to what degree microvia technology is implemented, and how much manufacturing yield changes as a result. IBIS Associates applied technical cost modeling in this paper to examine the cost issues of the enabling PWB infrastructure necessary to CSPs. The results of this comparison examine the cost structure of microvia technologies and show cost sensitivities to yield and area savings, thus providing an understanding of the cost tradeoffs