Title :
A Faster SA Method TOSA for Global Placement
Author :
Wang, Dong-qing ; Toyonaga, Masahiko ; Hu, Hua ; Ma, Jin-wei ; Fu, Xue-liang
Author_Institution :
Coll. of Comput. & Inf. Eng., Inner Mongolia Agric. Univ., Hohhot, China
Abstract :
In this paper, we propose a new ideas of the Simulated Annealing method to improve the execution time. SA method is an effective optimization algorithm for combinatorial problems such as a placement design for VLSI Chip, but a deficiency is the long execution time. Therefore, to improve the execution time of SA algorithm is widespread concern. In this paper, we propose a new idea TOSA that traces optimal elements to reduce ineffective select in the simulated Annealing process. We applied TOSA to the standard-cell global placement problems, premise the quality of solution and achieved more than 40 % faster time at most than those of simulated annealing.
Keywords :
VLSI; combinatorial mathematics; network synthesis; simulated annealing; TOSA; VLSI Chip; combinatorial problems; optimization algorithm; placement design; simulated annealing method; standard cell global placement problems; Computational modeling; Integrated circuit modeling; Mathematical model; Neodymium; Nickel; Simulated annealing; faster; global placement; simulated annealing;
Conference_Titel :
Electrical and Control Engineering (ICECE), 2010 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-6880-5
DOI :
10.1109/iCECE.2010.1177