DocumentCode
2986312
Title
Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design
Author
Singhee, Amith ; Wang, Jiajing ; Calhoun, Benton H. ; Rutenbar, Rob A.
Author_Institution
Carnegie Mellon Univ., Pittsburgh
fYear
2008
fDate
4-8 Jan. 2008
Firstpage
131
Lastpage
136
Abstract
Circuit reliability under statistical process variation is an area of growing concern. For highly replicated circuits such as SRAMs and flip flops, a rare statistical event for one circuit may induce a not-so-rare system failure. The Statistical Blockade was proposed as a Monte Carlo technique that allows us to efficiently filter-to block-unwanted samples insufficiently rare in the tail distributions we seek. However, there are significant practical problems with the technique. In this work, we show common scenarios in SRAM design where these problems render Statistical Blockade ineffective. We then propose significant extensions to make Statistical Blockade practically usable in these common scenarios. We show speedups of 102+ over standard Statistical Blockade and 104+ over standard Monte Carlo, for an SRAM cell in an industrial 90 nm technology.
Keywords
Monte Carlo methods; SRAM chips; integrated circuit design; integrated circuit reliability; Monte Carlo technique; SRAM circuit design; circuit reliability; highly replicated circuits; recursive statistical blockade; Acoustic noise; Circuit simulation; Circuit synthesis; Discrete event simulation; Gaussian noise; Measurement; Monte Carlo methods; Probability distribution; Random access memory; Statistics;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2008. VLSID 2008. 21st International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
0-7695-3083-4
Type
conf
DOI
10.1109/VLSI.2008.54
Filename
4450492
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