DocumentCode
2986991
Title
A hardware cache memcpy accelerator
Author
Wong, Stephan ; Duarte, Filipa ; Vassiliadis, Stamatis
Author_Institution
Dept. of Comput. Eng., Delft Univ. of Technol.
fYear
2006
fDate
Dec. 2006
Firstpage
141
Lastpage
148
Abstract
In this paper, we present a hardware solution to perform the commonly used memcpy operation with the goal to reduce the time to perform the actual memory copies. This is accomplished by taking advantage of the presence of a cache that is found next to many current-day (embedded) processors. Additionally, the currently presented solution assumes that to be copied data is already in the cache and is aligned by the cache-line size. We present the concept and implementation details of the proposed hardware module and the system used to experiment both our hardware and an optimized software implementation of the memcpy function. Experimental results show that the proposed hardware solution is at least 79% faster than an optimized hand-coded software solution
Keywords
cache storage; hardware-software codesign; embedded processors; hardware cache memcpy accelerator; memcpy function; memory copies; Acceleration; Assembly systems; Bluetooth; Data structures; Hardware; Kernel; Linux; Operating systems; Protocols; Software performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on
Conference_Location
Bangkok
Print_ISBN
0-7803-9729-0
Electronic_ISBN
0-7803-9729-0
Type
conf
DOI
10.1109/FPT.2006.270305
Filename
4042427
Link To Document