DocumentCode :
2987144
Title :
High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs
Author :
Kooht, S. ; Mirza-Aghatabar, M. ; Hessabi, S. ; Pedrani, M.
Author_Institution :
Sharif Univ. of Technol., Tehran
fYear :
2008
fDate :
4-8 Jan. 2008
Firstpage :
415
Lastpage :
420
Abstract :
Traffic models exert different message flows in a network and have a considerable effect on power consumption through different applications. So a good power analysis should consider traffic models. In this paper we present power and throughput models in terms of traffic rate parameters for the most popular traffic models, i e. Uniform, local, HotSpot and First Matrix Transpose (FMT) as a permutational traffic model. We also select Mesh topology as the most prominent NoC topology and validate the presented models by comparing our results against simulation results from Synopsys Power Compiler and Modelsim. From the comparison, we show that our modeling approach leads to average error of 2% for power and 2.8% for throughput modeling.
Keywords :
network topology; network-on-chip; HotSpot; Modelsim; Synopsys Power Compiler; first matrix transpose; high-level modeling; mesh topology; network-on-chip; power analysis; power consumption; traffic models; Energy consumption; Microprocessors; Network-on-a-chip; Performance analysis; Power system modeling; Telecommunication traffic; Throughput; Topology; Traffic control; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2008. VLSID 2008. 21st International Conference on
Conference_Location :
Hyderabad
ISSN :
1063-9667
Print_ISBN :
0-7695-3083-4
Type :
conf
DOI :
10.1109/VLSI.2008.40
Filename :
4450536
Link To Document :
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