Performance analysis of a growable architecture for broadband packet (ATM) switching

The authors examine a growable architecture for broadband packet (asynchronous transfer mode) switching, consisting of a memoryless, self-routing interconnect fabric and modest-size packet switch modules, proposed by K.U. Eng et al. (1989). They focus on the cell loss probability, because the architecture attains the best possible delay-throughput performance if the packet switch modules use output queueing. They compute an upper bound on the cell loss probability for arbitrary patterns of independent cell arrivals, possibly including isochronous circuit connections, and show that both sources of cell loss can be made negligibly small. For example, to guarantee a cell loss probability of less than 10^-9, this growable architecture requires packet switch modules of dimension 47×16, 45×16, 42×16, and 39×16 for 100%, 90%, 80%, and 70% traffic loads, respectively. The analytic techniques used to bound the cell loss probabilities are applicable to other output queueing architectures