DocumentCode
2987583
Title
Performance evaluations of ReconfigME
Author
Wigley, Grant ; Kearney, David
Author_Institution
Reconfigurable Comput. Lab., South Australia Univ., Mawson Lakes, SA
fYear
2006
fDate
Dec. 2006
Firstpage
309
Lastpage
312
Abstract
With the development of reconfigurable computers containing FPGAs with in excess of 6 million system-gates, it is now feasible to consider the possibility of sharing the FPGA between multiple concurrently executing applications. This could potentially increase the resource usage of the expensive FPGA logic and decrease response times so users will not have to wait for the FPGA to be completely available. However the system environment software required to support this, may actually result in application performance much less than would be considered acceptable to many FPGA users. This paper involves using a prototype to evaluate the performance of such an operating system, ReconfigME
Keywords
field programmable gate arrays; performance evaluation; reconfigurable architectures; software prototyping; FPGA; ReconfigME; performance evaluation; reconfigurable computers; Application software; Concurrent computing; Delay; Field programmable gate arrays; Operating systems; Prototypes; Reconfigurable logic; Software performance; Software prototyping; Software systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on
Conference_Location
Bangkok
Print_ISBN
0-7803-9729-0
Electronic_ISBN
0-7803-9729-0
Type
conf
DOI
10.1109/FPT.2006.270335
Filename
4042457
Link To Document