Accelerating Brain Circuit Simulations of Object Recognition with CELL Processors

Humans outperform computers on many natural tasks including vision. Given the human ability to recognize objects rapidly and almost effortlessly, it is pragmatically sensible to study and attempt to imitate algorithms used by the brain. Analysis of the anatomical structure and physiological operation of brain circuits has led to derivation of novel algorithms that in initial study have successfully addressed issues of known difficulty in visual processing. These algorithms are slow on uni-processor based systems, thwarting attempts to drive real-time robots for behavioral study, but as might be expected of algorithms designed for highly parallel brain architectures, they are intrinsically parallel and lend themselves to efficient implementation across multiple processors. This paper presents an implementation of such parallel algorithms on a CELL processor and further extends it to a low-cost cluster built using the Sony PlayStation 3 (PS3). The paper describes the modeled brain circuitry, derived algorithms, implementation on the PS3, and initial performance evaluation with respect to both speed and visual object recognition efficacy. The results show that a parallel implementation can achieve a 140x performance improvement on a cluster of 3 PS3s, attaining real-time processing delays. More importantly, we show that the improvements scale linearly, or nearly so in practice. These initial findings, while highly promising in their own right, also provide a new platform to enable extended investigation of large scale brain circuit models. Early prototyping of such large scale models has yielded evidence of their efficacy in recognition of time-varying, partially occluded, scale-invariant objects in arbitrary scenes.