Automatic synthesis of gate-level speed-independent control circuits from signal transition graphs

Author

Jung, Sung Tae ; Park, Eun Sei ; Kim, Jung Sik ; Jhon, Chu Shik

Author_Institution

ATM Syst. Sect., ETRI, Daejeon, South Korea

Volume

2

fYear

1995

fDate

30 Apr-3 May 1995

Firstpage

1211

Abstract

This paper presents an algorithm which synthesises gate-level speed-independent control circuits directly from signal transition graphs (STGs) by analyzing the relations between the signal transitions in the STG. It uses an exhaustive approach to improve the performance of the synthesized circuit in terms of the circuit area and speed. The experimental results show that our algorithm yields more efficient circuits than the existing works in reasonable time

Keywords

VLSI; asynchronous circuits; hazards and race conditions; integrated circuit design; logic CAD; signal flow graphs; VLSI; asynchronous circuits; automatic synthesis; circuit area; circuit speed; exhaustive approach; gate-level speed-independent control circuits; hazards; signal transition graphs; Algorithm design and analysis; Automatic control; Circuit analysis computing; Circuit synthesis; Clocks; Control system synthesis; Power generation economics; Signal analysis; Signal synthesis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-2570-2

Type

conf

DOI

10.1109/ISCAS.1995.520362

Filename

520362