A Behavior Model Based on Verilog-A for 14 Bits 200MHz Current-Steering DAC

Author

Lan Dai ; Zhi-bo Fu

Author_Institution

Coll. of Inf. Eng., North China Univ. of Technol., Beijing, China

fYear

2012

fDate

7-9 Dec. 2012

Firstpage

451

Lastpage

454

Abstract

In this paper a behavioral based on Verilog-A for segmented current-steering DAC is presented. Much attention was paid to the main circuits such as bandgap reference, current cells, switch array and other relative digital circuits. In this model, non-ideal factors including mismatch of current source transistors and switch glitch are considered, and it aims to model the DAC as accurate as possible. At last the simulation data is analyzed by 8192 points FFT.

Keywords

digital circuits; digital-analogue conversion; energy gap; hardware description languages; transistors; Verilog-A; bandgap reference; current cell; current source transistor; digital circuit; segmented current-steering DAC; switch array; switch glitch; Arrays; Hardware design languages; Integrated circuit modeling; Mathematical model; Photonic band gap; Semiconductor device modeling; Switches; Behavior model; Current Cells; DAC; Verilog-A;

fLanguage

English

Publisher

ieee

Conference_Titel

Control Engineering and Communication Technology (ICCECT), 2012 International Conference on

Conference_Location

Liaoning

Print_ISBN

978-1-4673-4499-9

Type

conf

DOI

10.1109/ICCECT.2012.183

Filename

6414066

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2988282