An Embedded Processor: Is It Ready for High-Performance Computing?

Author

Arakawa, F.

Author_Institution

Hitachi Ltd., Tokyo

fYear

2007

fDate

11-13 Jan. 2007

Firstpage

101

Lastpage

109

Abstract

High power-performance ratio is the most important factor in high-performance computing, whose performance is limited by its power budget. A SuperH (SH) embedded processor core, SH-X3, implemented in a 90-nm CMOS process running at 600 MHz achieved 1080 Dhrystone MIPS, 4.2 GFLOPS, and 55 M polygons/s. Its power performance ratio reaches to as high as 3000 MIPS/W. It is, therefore, a candidate processor for high-performance computing. This paper focuses on the SH processors´ low power features, floating-point architecture and performance, and applicability to the high- performance computing.

Keywords

CMOS integrated circuits; microprocessor chips; parallel processing; CMOS; SH-X3; SuperH embedded processor core; floating-point architecture; frequency 600 MHz; high-performance computing; size 90 nm; CMOS process; Computer architecture; Delay; Distributed power generation; Embedded computing; Frequency; High performance computing; Instruction sets; Laboratories; Pipelines;

fLanguage

English

Publisher

ieee

Conference_Titel

Innovative architecture for future generation high-performance processors and systems, 2007. iwia 2007. international workshop on

Conference_Location

Maui, HI

ISSN

1537-3223

Print_ISBN

0-7695-3077-X

Type

conf

DOI

10.1109/IWIA.2007.14

Filename

4450648

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2988290