DocumentCode :
298854
Title :
Automated programming of a ring-structured multiprocessor digital filter IC
Author :
Werter, Michael J. ; Willson, Alan N., Jr.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
2
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
1372
Abstract :
A computer algorithm is described that automatically writes optimal programs for the implementation of arbitrary digital filter structures on parallel processors. The algorithm has been adapted particularly for programming a DSP chip with multiple processors arranged in a ring-type topology. The algorithm starts from a netlist describing a desired digital filter structure. It can check all possible timing schedules and all possible distributions of the operations over the parallel processors, taking into account the constraints imposed by the multiprocessor topology and the processors´ architecture. The algorithm´s output is a set of programs for the parallel processors which causes them to implement the given digital filter
Keywords :
digital filters; digital signal processing chips; parallel algorithms; parallel programming; timing; DSP chip programming; automated programming; computer algorithm; digital filter IC; parallel processors; ring-structured multiprocessor; ring-type topology; timing schedules; Automatic programming; Computer architecture; Concurrent computing; Digital filters; Digital integrated circuits; Digital signal processing chips; Flow graphs; Partitioning algorithms; Signal processing algorithms; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
Type :
conf
DOI :
10.1109/ISCAS.1995.520402
Filename :
520402
Link To Document :
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