On-chip crosstalk evaluation between adjacent interconnections

Author

Servel, G. ; Deschacht, D.

Author_Institution

Lab. d´´Inf. de Robot et de Microelectron., UMR CNRS, Montpellier, France

Volume

2

fYear

2000

fDate

2000

Firstpage

827

Abstract

With the reduction of distances between wires in deep sub-micron technologies, coupling capacitances become significant. This increase of capacitance causes noise capable of propagating a logical fault. Poor evaluation of the crosstalk could be at the origin of a circuit malfunction. In this paper, we propose a new closed form expression for the crosstalk between two, three and five lines. Results given by our expression are compared with SPICE simulations for 0.25 μm technology

Keywords

SPICE; VLSI; crosstalk; distributed parameter networks; fault diagnosis; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; 0.25 μm technology; 0.25 mum; HSPICE simulations; VLSI; adjacent interconnections; circuit malfunction; closed form expression; coupling capacitances; crosstalk voltage; deep sub-micron technologies; distributed RC model; logical fault propagation; noise; on-chip crosstalk evaluation; Capacitance; Circuit noise; Coupling circuits; Crosstalk; Integrated circuit interconnections; Inverters; Predictive models; SPICE; Voltage; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on

Conference_Location

Jounieh

Print_ISBN

0-7803-6542-9

Type

conf

DOI

10.1109/ICECS.2000.913004

Filename

913004