5-GHz Frequency Synthesizer With Auto-Calibration Loop

Author

Kim, Myeungsu ; Lee, Kwengmook ; Kwon, Yongil ; Lim, Joonhyung ; Park, T.J.

Author_Institution

Samsung Electro-Mech., Suwon

fYear

2007

fDate

3-5 June 2007

Firstpage

713

Lastpage

716

Abstract

A 5-GHz frequency synthesizer for ZIGBEE(IEEE 802.15.4) was implemented. It consumes 13.5 mW adopting CMOS Logic divider and robust VCO from process and temperature variation by body voltage control of current source. It incorporates an automatic capacitor-bank tuning loop to extend frequency tuning range. This synthesizer was fabricated in 0.18-um technology; it consumes 7.5 mA at 1.8 V and offers 100 kHz-loop bandwidth and always -103 dBc/Hz at an offset of 1 MHz. the lock time is 30 us. The PLL output tuning range is 14% from 2.258 GHz to 2.614 GHz.

Keywords

calibration; frequency synthesizers; phase locked loops; voltage-controlled oscillators; CMOS logic divider; PLL output tuning range; ZIGBEE; auto-calibration loop; automatic capacitor-bank tuning loop; bandwidth 100 kHz; current 7.5 mA; current source; frequency 2.258 GHz to 2.614 GHz; frequency 5 GHz; frequency synthesizer; frequency tuning range; phase locked loops; robust voltage-controlled oscillator; time 30 mus; voltage 1.8 V; voltage control; Bandwidth; CMOS logic circuits; CMOS process; CMOS technology; Frequency locked loops; Frequency synthesizers; Robust control; Tuning; Voltage control; Voltage-controlled oscillators; Frequency divider; automatic calibration; integer N PLL; phase locked loop; prescaler;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE

Conference_Location

Honolulu, HI

ISSN

1529-2517

Print_ISBN

1-4244-0530-0

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2007.380982

Filename

4266530