Title :
A CCITT standard 32 kbps ADPCM LSI codec
Author :
Nishitani, Takao ; Kuroda, Ischiro ; Satoh, Masao ; Katoh, Tadaharu ; Fukuda, Reiichi ; Aoki, Yasushi
Author_Institution :
NEC Corporation, Kawasaki, Japan
Abstract :
An LSI ADPCM codec, which is based on the CCITT standard 32 kbps algorithm, has been developed. The LSI chip has been designed as a software controllable signal processor whose architecture is optimized for the CCITT algorithm. A reconfigurable pipeline multiplier-normalizer-accumulator circuit is effectively utilized for realizing complex ADPCM specifications. The LSI chip, implemented by 2.5 µ CMOS technology, dissipates only 90 milliwatts of power.
Keywords :
Algorithm design and analysis; CMOS technology; Code standards; Codecs; Large scale integration; Process control; Signal design; Signal processing algorithms; Software design; Standards development;
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '85.
DOI :
10.1109/ICASSP.1985.1168091
