DocumentCode :
2989548
Title :
Low-power CMOS implantable nerve signal analog processing circuit
Author :
Harb, Adnan ; Sawan, Mohamad
Author_Institution :
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
Volume :
2
fYear :
2000
fDate :
2000
Firstpage :
911
Abstract :
We describe a low-voltage low-power CMOS nerve signal analog processing circuit for biomedical applications. It is dedicated to an implantable bladder controller. After amplifying the nerve signal with low-noise high-CMRR instrumentation amplifier, it is rectified and bin-integrated (RBI) with a low-power CMOS analog processing circuit. This circuit is based on switched capacitor technique. Using techniques to reduce operational amplifier requirements ensures low-power consumption. The circuit has been designed in CMOS 0.35 μm technology. The simulation results of the main parts of the proposed analog circuit are presented. At a supply voltage of 2.2 V the power dissipation is 700 μW
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; biocontrol; biological organs; biomedical electronics; handicapped aids; instrumentation amplifiers; low-power electronics; neuromuscular stimulation; prosthetics; switched capacitor networks; 0.35 micron; 2.2 V; 700 muW; biomedical applications; high-CMRR instrumentation amplifier; implantable bladder controller; low-power CMOS; nerve signal analog processing circuit; operational amplifier requirements; power dissipation; switched capacitor technique; Analog processing circuits; Bladder; CMOS analog integrated circuits; CMOS process; CMOS technology; Instruments; Low-noise amplifiers; Signal processing; Switched capacitor circuits; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location :
Jounieh
Print_ISBN :
0-7803-6542-9
Type :
conf
DOI :
10.1109/ICECS.2000.913024
Filename :
913024
Link To Document :
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