A digitally programmable current mode analog shunting inhibition cellular neural network

A novel read-out and column circuit for VLSI implementation of a shunting inhibition cellular neural network (SICNN) is proposed. Image enhancement and edge detection based on SICNN with programmable mask size are achieved within a CMOS imager. In contrast to most existing implementations, the circuit is based on a mixed analog digital approach in which the read-out is realized using a digital circuit while the processing takes advantage of the compactness and low power of the current mode approach. The mask size and coefficients can be varied with a digitally programmable current mode analog processor. In addition, the pixel output and the processed SICNN output are obtained simultaneously on the ¯y resulting in a real-time computation of SICNN. The imager has been fabricated using 0.7 μm CMOS technology