Title :
Extraction of functional information from combinational circuits
Author :
Ohmura, M. ; Yasuura, H. ; Tamaru, K.
Author_Institution :
Dept. of Electron., Kyoto Univ., Japan
Abstract :
A technique is presented for functional information extraction, which is the transformation of design descriptions from the logic circuit level to the functional level. The authors have developed a functional information extraction system, FINES, which can deal with both logic functions and arithmetic functions. The technique has made use of the characteristics of the functions in order to perform function extraction independent of the circuit structures.<>
Keywords :
combinatorial circuits; logic CAD; FINES; arithmetic functions; combinational circuits; design descriptions; functional information extraction; functional level; logic circuit level; logic functions; Arithmetic; Automatic logic units; Circuit synthesis; Combinational circuits; Data mining; Design automation; Logic circuits; Logic design; Logic functions; Synthesizers;
Conference_Titel :
Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2055-2
DOI :
10.1109/ICCAD.1990.129873